ttp://www.xtremesystems.org/forums/archive/index.php?t-92190-p-5.html tREF = tREFI / tCK tREFI = self-refresh interval in us, its usually 7.8us but some cases are higher on lower end memory ics. ie. for 7.8us its value is 7800[ns] tCK is the clock period,( 1us / ddr_io_frequency ) ie for 1066mhz ddr, tCK = 1000 / 533 = ~ 1.86ns to complete a clock cycle. tREF = 7800[ns] / 1.86[ns] = 4194 clock cycles in a 7.8us self refresh interval for ddr-1066, since tCK = x[T], tREF = 4194T 0264名無しさん@お腹いっぱい。2014/10/01(水) 02:13:17.07ID:THFLoj/v0>>263の裏付け
DDR3 Temperature dependence on refresh requirement, 64ms@85oC, 32ms@95oC JEDEC simply specifies the time interval (tREFI, time REFresh Interval) tREFI = 64ms/8096 = 7.8 us (3.9 us for 95oC)